Fuze signal circuit

ABSTRACT

An infrared fuze signal processing circuit which reduces the probability of early firing of the warhead due to the presence of target signal modulation. The invention differentiates between signal modulation and actual overtake target signature and precisely determines the point of signal fall off.

atenfi 19 [111 3,924,536

E] ate S888 Dick et al. Dec. 9, 1975 [5 FUZE SIGNAL CIRCUIT 2,927,213 3/1960 Marion et al 102/702 P x 3,218,470 11/1965 Padgett et al 307/885 [75] Inventors- Rwerslde Ward M 3,225,695 12/1965 Kapp et al. 102/702 Forrester, Corona, both of Calif.

[73] Assignee: The United States of America as represented by the Secretary of the Navy, Washington, DC.

221 Filed: Nov. 15, 1965 21 Appl. No.: 507,962

Primary ExaminerVerlin R. Pendegrass Attorney, Agent, or FirmRichard S. Sciascia; Joseph M. St. Amand; T. M. Phillips [57] ABSTRACT [52] US. Cl. l02/70.2 P An infrared fuze Si 1 gna processmg c1rcu1t which re [51] Int. Cl- F42C 13/02 duces the probability of early firing of the warhead [58] Field of Search 102/702; 307/885; due to the presence of target Signal modulation. The 250/203 invention differentiates between signal modulation and actual overtake target signature and precisely de- [56] References Cited termines the point'of signal fall off.

UNITED STATES PATENTS 2,898,857 8/1959 Hafstacl et al. 102/702 P 8 Claims, 2 Drawing Figures 10 12 28 (C l I 0/ /1e is l 24 2o 27 a. 1 A5 ifsz US. Patent Dec. 9 1975 FIG! FUZE SIGNAL CIRCUIT The invention herein described may be manufactured and used by or for the Government of the United States of America for governmental purposes without the payment of any royalties thereon or therefor.

The present invention relates to an IR fuze signal circuit and more particularly to a fuze signal circuit which can differentiate between signal anomalities and actual overtake target signature to ascertain point of proper warhead detonation for optimum kill probability.

Signal envelopes of infrared target sources such as jet engine exhaust plumes as seen by an IR detector scaning a narrow field of view have been discovered to contain a high degree of modulation. Prior circuits for processing these signals simply differentiated the waveform to select the voltage transition occurring at intercept (point at which signal falls off rapidly). However, the magnitude of the modulation spikes (up to 60%) is often larger than the minimum signal necessary to actuate the fuze. Due to the wide dynamic range required in the fuzing system, the magnitude of the modulation spikes may be much larger than the minimum signal necessary to produce fuze actuation. In addition, due to the wide range of intercept velocities and signal pulse width, there is no way in which the signal processing circuitry can distinguish between a true signal and the modulation spikes. The result of this is that the fuze may fire prematurely upon the modulation and thus fail to destroy the intended target.

Accordingly, an object of the present invention is to provide a fuze signal circuit which overcomes the above mentioned disadvantages of prior known circuits by reducing the probability of early firing due to noise in the form of the modulation of the target signal by precisely determining the point of signal fall off.

Another object is to provide a fuze signal circuit double-diode increases the precision of the firing of the fuze and decreases the possibility of dudding due to long pulse width signals resulting from a slow missile to target overtake velocity.

Other objects and many of the attendant advantages of this invention will become readily appreciated as the same becomes better understood by reference to the following detailed description when considered in connection with the accompanying drawings wherein:

FIG. 1 shows a graph of an ideal signal return (a) and the actual signal (b).

FIG. 2 shows a circuit diagram and accompanying waveform of a preferred embodiment of the invention.

Referring now to the drawing there is shown in FIG. 2, a received signal waveform A from a target (after amplification) is applied at input terminal of the signal processing circuit. Waveform signal A is coupled through coupling capacitor 12 and diode 14 to charge capacitor 16 as shown in waveform B. Diode l4 acts as a selective gate, passing only positive going signals and blocking those of negative polarity. At termination of the intercept waveform A, capacitor 16 has charged to the peak value of waveform A. The value of resistor 18 should be chosen large to provide a long time constant storage circuit (capacitor 16 and resistor 18). As waveform A returns to zero, there is an overshoot portion 19 caused by the amplifier (not shown) preceding terminal 10 which develops a negative going voltage across resistor 20. This negative going voltage biases diode 22 into forward conduction, coupling a negative voltage waveform C to the emitter of silicon controlled rectifier (SCR) 24 causing it to fire (conduct) and discharge capacitor 16. An NPN silicon switching transistor may be used in place of the SCR 24. The discharge of capacitor 16 is coupled as a sharp negative spike, waveform D, through coupling capacitor 26 and across load resistor 27 to a firing circuit (not shown) at terminal 28. Resistor 30 and diodes 32 and 34 act as a clamping circuit to protect SCR 24 from possible damage. The two diodes in series insure that sufficient signal is present to fire SCR 24 before clamping action occurs.

Obviously many modifications and variations of the present invention are possible in the light of the above teachings. It is therefore to be understood that within the scope of the appended claims the invention may be practiced otherwise than as specifically described.

What is claimed is:

1. In a fuze signal processing circuit of an infrared guided missile fuzing system, the combination comprismg:

a. capacitor storage circuit means adapted to be charged by only the positive going portions of a reflected target signal having a modulated sawtooth waveform with a negative overshoot at its trailing edge,

b. switch circuit means coupled across said capacitor storage circuit means and being responsive to the negative overshoot portion of the noise modulated signal to close said switch circuit means and thereby discharge said capacitor storage circuit means to produce an output pulse.

2. The circuit of claim 1 wherein said capacitor charge storage circuit means comprises a first forward biased diode connected in series with a resistor-capacitor network.

3. The circuit of claim 2 wherein said switch circuit means is a silicon controlled rectifier having its emitter connected in series with a second forward biased diode which is oppositely poled to that of said first forward biased diode.

4. The circuit of claim 2 wherein said switch circuit means is a silicon controlled rectifier having its emitter connected in series with a second forward biased diode which is oppositely poled to that of said first forward biased diode.

5. The circuit of claim 1 wherein said capacitor storage circuit means comprises:

a. an input terminal adapted to receive a signal voltage having a modulated sawtooth waveform with a negative overshoot at its trailing edge,

b. a first diode having its positive terminal coupled to said input terminal,

c. a capacitor connected to the negative terminal and in series with said first diode so that only positive going portions of said sawtooth signal will contribute to the charging of said capacitor,

d. a resistor connected in parallel with said capacitor and having a value to provide a long time constant in the discharge of said capacitor.

6. The circuit of claim 5 wherein said switch circuit means comprises:

a. a silicon controlled rectifier having its collector connected to said capacitor and its emitter connected to the positive terminal of a second diode,

b. circuit means coupling the negative terminal of said second diode to said input terminal,

c. a load resistor connected to the positive terminal of said second diode and the emitter of said silicon 4 controlled rectifier for applying the negative volta. an NPN silicon switching transistor having its colage pr uce y he negatlve overshoot POrllOn f lector connected to said capacitor and its emitter Said sawtocfth voltage to cause Said connected to the positive terminal of a second trolled rectifier to conduct and thereby discharge diode said capacitor and produce an output pulse. 7. The circuit of claim 6 wherein a doublediode clamp circuit is connected to the positive terminal of said second diode and the emitter of said silicon conb. circuit means coupling the negative terminal of said second diode to said input terminal, 0. a load resistor connected to the positive terminal trolled rectifier for clamping the negative voltage prof dlode f the Emmet-Pf Sald NPN duced by the negative overshoot portion of said saw- 10 511160 Swtchmg translstor for applyfng the nega' tooth waveform voltage to protect said silicon confive Pr y the negatlve oversho? trolled rectifier from damage by high amplitudes of said P of said Sawtooth Voltage Cause i negative overshoot. switching transistor to conduct and discharge said 8. The circuit of claim 5 wherein said switch circuit capacitor and produce an output pulse.

means comprises: 

1. In a fuze signal processing circuit of an infrared guided missile fuzing system, the combination comprising: a. capacitor storage circuit means adapted to be charged by only the positive going portions of a reflected target signal having a modulated sawtooth waveform with a negative overshoot at its trailing edge, b. switch circuit means coupled across said capacitor storage circuit means and being responsive to the negative overshoot portion of the noise modulated signal to close said switch circuit means and thereby discharge said capacitor storage circuit means to produce an output pulse.
 2. The circuit of claim 1 wherein said capacitor charge storage circuit means comprises a first forward biased diode connected in series with a resistor-capacitor network.
 3. The circuit of claim 2 wherein said switch circuit means is a silicon controlled rectifier having its emitter connected in series with a second forward biased diode which is oppositely poled to that of said first forward biased diode.
 4. The circuit of claim 2 wherein said switch circuit means is a silicon controlled rectifier having its emitter connected in series with a second forward biased diode which is oppositely poled to that of said first forward biased diode.
 5. The circuit of claim 1 wherein said capacitor storage circuit means comprises: a. an input terminal adapted to receive a signal voltage having a modulated sawtooth waveform with a negative overshoot at its trailing edge, b. a first diode having its positive terminal coupled to said input terminal, c. a capacitor connected to the negative terminal and in series with said first diode so that only positive going portions of said sawtooth signal will contribute to the charging of said capacitor, d. a resistor connected in parallel with said capacitor and having a value to provide a long time constant in the discharge of said capacitor.
 6. The circuit of claim 5 wherein said switch circuit means comprises: a. a silicon controlled rectifier having its collector connected to said capacitor and its emitter connected to the positive terminal of a second diode, b. circuit means coupling the negative terminal of said second diode to said input terminal, c. a load resistor connected to the positive terminal of said second diode and the emitter of said silicon controlled rectifier for applying the negative voltage produced by the negative overshoot portion of said sawtooth voltage to cause said silicon controlled rectifier to conduct and thereby discharge said capacitor and produce an output pulse.
 7. The circuit of claim 6 whereiN a doublediode clamp circuit is connected to the positive terminal of said second diode and the emitter of said silicon controlled rectifier for clamping the negative voltage produced by the negative overshoot portion of said sawtooth waveform voltage to protect said silicon controlled rectifier from damage by high amplitudes of said negative overshoot.
 8. The circuit of claim 5 wherein said switch circuit means comprises: a. an NPN silicon switching transistor having its collector connected to said capacitor and its emitter connected to the positive terminal of a second diode, b. circuit means coupling the negative terminal of said second diode to said input terminal, c. a load resistor connected to the positive terminal of said second diode and the emitter of said NPN silicon switching transistor for applying the negative voltage produced by the negative overshoot portion of said sawtooth voltage to cause said switching transistor to conduct and discharge said capacitor and produce an output pulse. 